Spacer Engineered FinFET Architectures by Sudeb Dasgupta, Brajesh Kumar Kaushik & Pankaj Kumar Pal

Spacer Engineered FinFET Architectures

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This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.

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